Semiconductor devices generally include a plurality of circuits which form an integrated circuit fabricated on a semiconductor substrate. To improve the performance of the circuits, low k dielectric materials having a dielectric constant of less than silicon dioxide, such as porous dielectric materials, have been used as inter-layer dielectric (ILD) to further reduce capacitance. Interconnect structures made of metal lines or vias are usually formed in and around the porous dielectric material ILD to connect elements of the circuits. An interconnect structure may consist of multilevel or multilayered schemes, such as, for example, single or dual damascene wiring structures. Within a typical interconnect structure, metal lines run parallel to the semiconductor substrate, while metal vias run perpendicular to the semiconductor substrate.
Electromigration (EM) and time dependent dielectric breakdown (TDDB) are two major reliability concerns for copper (Cu) interconnects. EM is the transport of material caused by the gradual movement of the ions in a conductor due to the momentum transfer between conducting electrons and diffusing metal atoms. TDDB occurs when adjacent interconnects are biased differently over an extended period of time which results in leakage current increase and eventually electrical shorts. Both EM and TDDB decrease the reliability of metal interconnects.
To reduce EM and TDDB of a metal interconnect, a dielectric capping layer is deposited directly on the metal. By atomically bonding to the uppermost surface of the underlying metal, the dielectric capping layer retards EM of the metal interconnect. In order to deposit the dielectric cap layer that atomically adheres to the metal, it is necessary to remove non-metallic materials, e.g., metal oxide of the underlying metal, from the surface of the metal. Typically, a “pre-clean” process such as plasma treatment is required to remove the metal oxide materials on the metal. Such a pre-clean process can cause damage to the dielectric material surrounding the metal in the metal interconnect structure. The damage is even worse when the dielectric material is a low dielectric constant (low-k) material.
Another type of capping layer comprises a metallic capping layer. Compared to the dielectric capping layer, the metallic capping layer typically has better adhesion strength to the underlying metal. The increased adhesion strength results in better EM resistance to the metal interconnect. For example, a Cu interconnect with a Co alloy capping layer has demonstrated a greater than 10 times EM resistance than the Cu interconnect with a standard dielectric capping layer. Despite the improvement in EM resistance, the use of a metallic capping layer tends to leave metallic residues on the surface of the dielectric material between the metal features in the metal interconnect. The presence of the metallic residues hinders the reliability of the metal interconnect.
In view of the above, there is a need for providing a metal interconnect structure having enhanced EM and TDDB reliabilities. There is also a need for providing a method for making such a metal interconnect structure.